RTP Growth of Germanium Oxynitride for MOSFeT Fabrication

Germanium channel MOSFETs are considered one of the promising options for high performance CMOS technology because of the high electron and hole mobility, as well as high ballistic carrier injection velocity in germanium. One of the most important challenges in integrating the Ge MOSFETs is the formation of high quality gate dielectrics on the Ge surface. Several attempts have been made in recent years to deposit high-k dielectrics on Ge [1, 2]. However, by far the highest mobility reported for Ge MOSFETs is obtained using a thermally grown germanium oxynitride [3]. A rapid thermal processing (RTP) version of such processes is of interest for providing realistic EOT values for futuristic devices, while offering the possibility of obtaining high carrier mobility values similar to those reported earlier for Ge MOSFETs with an oxynitride dielectric grown in a furnace. Germanium oxynitride gate dielectrics are grown on 6” (100) n-type germanium wafers as well as relaxed p-type Ge layers epitaxially grown on silicon. A special “RCA-equivalent” cleaning process has been developed to minimize Ge loss during the cleaning step and to give reasonably smooth surface (Ra ~ 0.25 nm). Oxidation is performed in an RTP chamber at 550°C for 30-60 s and in oxygen, followed by a nitridation step at 600°C for 60-300 s in ammonia. From spectroscopic ellipsometry the thickness of the oxynitride layer is determined to be 50±5 Å. Upon nitridation, the refraction index of the film measured at 600 nm is increased from 1.3 to 1.7, indicating the oxynitride formation. From CV measurements the effective electrical oxide thickness is about 30 Å, corresponding to a dielectric constant of about 6.5. MOS capacitors made by depositing Al gates on as grown oxynitride dielectrics show a kink in the CV characteristics measured at lower frequencies. A forming gas annealing step at 400°C effectively removes this kink and reduces the density of surface states. The midgap Dit extracted from the conductance method is roughly 8×10 cm. PMOS transistors were fabricated with a TiN metal gate and show a peak effective mobility of 280 cm/V.s which corresponds to 40% enhancement over p-channel Si MOSFETs.